Architecture Design for Soft Errors
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Table of contents
- Table of Contentsvii
- Forewordxiii
- Prefacexvii
- Chapter 1. Introduction1
- 1.1 Overview1
- 1.2 Faults6
- 1.3 Errors7
- 1.4 Metrics9
- 1.5 Dependability Models11
- 1.6 Permanent Faults in Complementary Metal Oxide Semiconductor Technology14
- 1.7 Radiation-Induced Transient Faults in CMOS Transistors20
- 1.8 Architectural Fault Models for Alpha Particle and Neutron Strikes30
- 1.9 Silent Data Corruption and Detected Unrecoverable Error32
- 1.10 Soft Error Scaling Trends36
- 1.11 Summary38
- 1.12 Historical Anecdote39
- References40
- Chapter 2. Device and Circuit-Level Modeling Measurement and Mitigation43
- 2.1 Overview43
- 2.2 Modeling Circuit-Level SERs44
- 2.3 Measurement60
- 2.4 Mitigation Techniques67
- 2.5 Summary74
- 2.6 Historical Anecdote76
- References76
- Chapter 3. Architectural Vulnerability Analysis79
- 3.1 Overview79
- 3.2 AVF Basics80
- 3.3 Does a Bit Matter?81
- 3.4 SDC and DUE Equations82
- 3.5 ACE Principles90
- 3.6 Microarchitectural Un-ACE Bits93
- 3.7 Architectural Un-ACE Bits94
- 3.8 AVF Equations for a Hardware Structure96
- 3.9 Computing AVF with Little’s Law98
- 3.10 Computing AVF with a Performance Model101
- 3.11 ACE Analysis Using the Point-of-Strike Fault Model106
- 3.12 ACE Analysis Using the Propagated Fault Model114
- 3.13 Summary118
- 3.14 Historical Anecdote118
- References119
- Chapter 4. Advanced Architectural Vulnerability Analysis121
- 4.1 Overview121
- 4.2 Lifetime Analysis of RAM Arrays123
- 4.3 Lifetime Analysis of CAM Arrays134
- 4.4 Effect of Cooldown in Lifetime Analysis138
- 4.5 AVF Results for Cache, Data Translation Buffer, and Store Buffer140
- 4.6 Computing AVFs Using SFI into an RTL Model146
- 4.7 Case Study of SFI152
- 4.8 Summary158
- 4.9 Historical Anecdote159
- References160
- Chapter 5. Error Coding Techniques161
- 5.1 Overview161
- 5.2 Fault Detection and ECC for State Bits162
- 5.3 Error Detection Codes for Execution Units181
- 5.4 Implementation Overhead of Error Detection and Correction Codes187
- 5.5 Scrubbing Analysis190
- 5.6 Detecting False Errors194
- 5.7 Hardware Assertions200
- 5.8 Machine Check Architecture202
- 5.9 Summary203
- 5.10 Historical Anecdote205
- References205
- Chapter 6. Fault Detection via Redundant Execution207
- 6.1 Overview207
- 6.2 Sphere of Replication208
- 6.3 Fault Detection via Cycle-by-Cycle Lockstepping212
- 6.4 Lockstepping in the Hewlett-Packard NonStop Himalaya Architecture218
- 6.5 Lockstepping in the IBM Z-series Processors220
- 6.6 Fault Detection via RMT222
- 6.7 RMT in the Marathon Endurance Server223
- 6.8 RMT in the Hewlett-Packard NonStop® Advanced Architecture225
- 6.9 RMT Within a Single-Processor Core227
- 6.10 RMT in a Multicore Architecture240
- 6.11 DIVA: RMT Using Specialized Checker Processor241
- 6.12 RMT Enhancements244
- 6.13 Summary247
- 6.14 Historical Anecdote248
- References250
- Chapter 7. Hardware Error Recovery253
- 7.1 Overview253
- 7.2 Classification of Hardware Error Recovery Schemes254
- 7.3 Forward Error Recovery258
- 7.4 Backward Error Recovery with Fault Detection before Register Commit263
- 7.5 Backward Error Recovery with Fault Detection before Memory Commit277
- 7.6 Backward Error Recovery with Fault Detection before I/O Commit283
- 7.7 Backward Error Recovery with Fault Detection after I/O Commit292
- 7.8 Summary292
- 7.9 Historical Anecdote294
- References294
- Chapter 8. Software Detection and Recovery297
- 8.1 Overview297
- 8.2 Fault Detection Using SIS299
- 8.3 Fault Detection Using Software RMT301
- 8.4 Fault Detection Using Hybrid RMT309
- 8.5 Fault Detection Using RVMs313
- 8.6 Application-Level Recovery315
- 8.7 OS-Level and VMM-Level Recoveries322
- 8.8 Summary323
- References324
- Index327
This book provides a comprehensive description of the architetural techniques to tackle the soft error problem. It covers the new methodologies for quantitative analysis of soft errors as well as novel, cost-effective architectural techniques to mitigate them. To provide readers with a better grasp of the broader problem deffinition and solution space, this book also delves into the physics of soft errors and reviews current circuit and software mitigation techniques.
TABLE OF CONTENTS
Chapter 1: Introduction
Chapter 2: Device- and Circuit-Level Modeling, Measurement, and Mitigation
Chapter 3: Architectural Vulnerability Analysis
Chapter 4: Advanced Architectural Vulnerability Analysis
Chapter 5: Error Coding Techniques
Chapter 6: Fault Detection via Redundant Execution
Chapter 7: Hardware Error Recovery
Chapter 8: Software Detection and Recovery
* Helps readers build-in fault tolerance to the billions of microchips produced each year, all of which are subject to soft errors
* Shows readers how to quantify their soft error reliability
* Provides state-of-the-art techniques to protect against soft errors
TABLE OF CONTENTS
Chapter 1: Introduction
Chapter 2: Device- and Circuit-Level Modeling, Measurement, and Mitigation
Chapter 3: Architectural Vulnerability Analysis
Chapter 4: Advanced Architectural Vulnerability Analysis
Chapter 5: Error Coding Techniques
Chapter 6: Fault Detection via Redundant Execution
Chapter 7: Hardware Error Recovery
Chapter 8: Software Detection and Recovery
* Helps readers build-in fault tolerance to the billions of microchips produced each year, all of which are subject to soft errors
* Shows readers how to quantify their soft error reliability
* Provides state-of-the-art techniques to protect against soft errors