ESL Design and Verification: A Prescription for Electronic System Level Methodology
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Table of contents
- Table of contentsv
- FOREWORD: ESL FROM THE TRENCHESxvii
- AUTHORS’ ACKNOWLEDGMENTSxix
- ABOUT THE AUTHORSxxi
- ABOUT THE CONTRIBUTORSxxiii
- Chapter 1. WHAT IS ESL?1
- 1.1 SO, WHAT IS ESL?1
- 1.2 WHO SHOULD READ THIS BOOK5
- 1.3 STRUCTURE OF THE BOOK AND HOW TO READ IT6
- 1.4 CHAPTER LISTING7
- 1.5 THE PRESCRIPTION9
- References9
- Chapter 2. TAXONOMY AND DEFINITIONS FOR THE ELECTRONIC SYSTEM LEVEL11
- 2.1 TAXONOMY11
- 2.1.1 Introduction11
- 2.1.2 Model Taxonomy12
- 2.1.3 ESL Taxonomy14
- 2.2 DEFINITIONS29
- References33
- Chapter 3. EVOLUTION OF ESL DEVELOPMENT35
- 3.1 INTRODUCTION35
- 3.2 MOTIVATION FOR ESL DESIGN37
- 3.3 TRADITIONAL SYSTEM DESIGN EFFECTIVENESS39
- 3.4 SYSTEM DESIGN WITH ESL METHODOLOGY40
- 3.5 BEHAVIORAL MODELING METHODOLOGY41
- 3.6 BEHAVIORAL MODELING ENVIRONMENTS44
- 3.7 HISTORICAL BARRIERS TO ADOPTION OF BEHAVIORAL MODELING52
- 3.8 AUTOMATED IMPLEMENTATION OF FIXED-FUNCTION HARDWARE56
- 3.9 AUTOMATED IMPLEMENTATION OF PROGRAMMABLE HARDWARE62
- 3.10 MAINSTREAMING ESL METHODOLOGY70
- 3.11 PROVOCATIVE THOUGHTS72
- 3.12 THE PRESCRIPTION75
- References76
- Chapter 4. WHAT ARE THE ENABLERS OF ESL?81
- 4.1 TOOL AND MODEL LANDSCAPE82
- 4.2 SYSTEM DESIGNER REQUIREMENTS84
- 4.3 SOFTWARE TEAM REQUIREMENTS89
- 4.4 HARDWARE TEAM REQUIREMENTS98
- 4.5 WHO WILL SERVICE THESE DIVERSE REQUIREMENTS?101
- 4.6 FREE OR OPEN SOURCE SOFTWARE102
- 4.7 SUMMARY109
- 4.8 THE PRESCRIPTION110
- References110
- Chapter 5. ESL FLOW113
- 5.1 SPECIFICATIONS AND MODELING115
- 5.2 PRE-PARTITIONING ANALYSIS117
- 5.3 PARTITIONING119
- 5.4 POST-PARTITIONING ANALYSIS AND DEBUG123
- 5.5 POST-PARTITIONING VERIFICATION126
- 5.6 HARDWARE IMPLEMENTATION127
- 5.7 SOFTWARE IMPLEMENTATION130
- 5.8 USE OF ESL FOR IMPLEMENTATION VERIFICATION133
- 5.9 PROVOCATIVE THOUGHTS137
- 5.10 SUMMARY137
- 5.11 THE PRESCRIPTION138
- References138
- Chapter 6. SPECIFICATIONS AND MODELING139
- 6.1 THE PROBLEM OF SPECIFICATION139
- 6.2 REQUIREMENTS MANAGEMENT AND PAPER SPECIFICATIONS143
- 6.3 ESL DOMAINS147
- 6.4 EXECUTABLE SPECIFICATIONS149
- 6.5 SOME ESL LANGUAGES FOR SPECIFICATION153
- 6.6 PROVOCATIVE THOUGHTS: MODEL-BASED DEVELOPMENT160
- 6.7 SUMMARY169
- 6.8 THE PRESCRIPTION170
- References171
- Chapter 7. PRE-PARTITIONING ANALYSIS175
- 7.1 STATIC ANALYSIS OF SYSTEM SPECIFICATIONS176
- 7.2 THE ROLE OF PLATFORM-BASED ESL DESIGN IN PRE-PARTITIONING ANALYSIS183
- 7.3 DYNAMIC ANALYSIS185
- 7.4 ALGORITHMIC ANALYSIS186
- 7.5 ANALYSIS SCENARIOS AND MODELING189
- 7.6 DOWNSTREAM USE OF ANALYSIS RESULTS194
- 7.7 CASE STUDY: JPEG ENCODING195
- 7.8 SUMMARY AND PROVOCATIVE THOUGHTS200
- 7.9 THE PRESCRIPTION201
- References201
- Chapter 8. PARTITIONING205
- 8.1 INTRODUCTION205
- 8.2 FUNCTIONAL DECOMPOSITION211
- 8.3 ARCHITECTURE DESCRIPTION214
- 8.4 PARTITIONING226
- 8.5 THE HARDWARE PARTITION231
- 8.6 THE SOFTWARE PARTITION235
- 8.7 RECONFIGURABLE COMPUTING243
- 8.8 COMMUNICATION IMPLEMENTATION248
- 8.9 PROVOCATIVE THOUGHTS254
- 8.10 SUMMARY256
- 8.11 THE PRESCRIPTION257
- References257
- Chapter 9. POST-PARTITIONING ANALYSIS AND DEBUG265
- 9.1 ROLES AND RESPONSIBILITIES266
- 9.2 HARDWARE AND SOFTWARE MODELING AND CO-MODELING269
- 9.3 PARTITIONED SYSTEMS AND RE-PARTITIONING275
- 9.4 PRE-PARTITIONED MODEL COMPONENTS279
- 9.5 ABSTRACTION LEVELS280
- 9.6 COMMUNICATION SPECIFICATION284
- 9.7 DYNAMIC AND STATIC ANALYSES285
- 9.8 PROVOCATIVE THOUGHTS290
- 9.9 SUMMARY291
- 9.10 THE PRESCRIPTION292
- References293
- Chapter 10. POST-PARTITIONING VERIFICATION295
- 10.1 INTRODUCTION296
- 10.2 VERIFICATION PLANNING299
- 10.3 VERIFICATION ENVIRONMENT IMPLEMENTATION316
- 10.4 VERIFICATION RESULTS ANALYSIS319
- 10.5 ABSTRACT COVERAGE322
- 10.6 OTHER APPROACHES323
- 10.7 PROVOCATIVE THOUGHTS327
- 10.8 SUMMARY329
- 10.9 THE PRESCRIPTION329
- References329
- Chapter 11. HARDWARE IMPLEMENTATION333
- 11.1 INTRODUCTION333
- 11.2 EXTENSIBLE PROCESSORS334
- 11.3 DSP COPROCESSORS335
- 11.4 CUSTOMIZED VLIW COPROCESSORS335
- 11.5 APPLICATION-SPECIFIC COPROCESSORS336
- 11.6 HIGH-LEVEL HARDWARE DESIGN FLOW FOR ASICS AND FPGAS336
- 11.7 BEHAVIORAL SYNTHESIS338
- 11.8 ESL SYNTHESIS344
- 11.9 HARDWARE DESIGN OR SILVER BULLET?366
- 11.10 DESIGN EXPLORATION372
- 11.11 PROVOCATIVE THOUGHTS374
- 11.12 SUMMARY376
- 11.13 THE PRESCRIPTION376
- References377
- Bibliography377
- Chapter 12. SOFTWARE IMPLEMENTATION379
- 12.1 INTRODUCTION379
- 12.2 CLASSICAL SOFTWARE DEVELOPMENT METHODS FOR EMBEDDED SYSTEMS AND SOCs379
- 12.3 DEVELOPING RUN-TIME SOFTWARE FROM ESL MODELS384
- 12.4 DEVELOPING SOFTWARE USING ESL MODELS AS RUN-TIME ENVIRONMENTS386
- 12.5 PROVOCATIVE THOUGHTS395
- 12.6 SUMMARY396
- 12.7 THE PRESCRIPTION397
- References397
- Chapter 13. USE OF ESL FOR IMPLEMENTATION VERIFICATION399
- 13.1 WHAT THIS CHAPTER IS NOT ABOUT400
- 13.2 POSITIVE AND NEGATIVE VERIFICATION400
- 13.3 VERIFICATION FOCUS401
- 13.4 CLEAR BOX VERIFICATION404
- 13.5 VERIFICATION IP405
- 13.6 PROPERTIES AND ASSERTIONS407
- 13.7 COVERAGE412
- 13.8 SYSTEM VERIFICATION415
- 13.9 POST-SILICON DEBUG416
- 13.10 PROVOCATIVE THOUGHTS419
- 13.11 SUMMARY420
- 13.12 THE PRESCRIPTION421
- References422
- Chapter 14. RESEARCH, EMERGING, AND FUTURE PROSPECTS425
- 14.1 RESEARCH425
- 14.2 GLOBALIZATION432
- 14.3 VALUE MIGRATION435
- 14.4 EDUCATION437
- 14.5 THE HEALTH OF THE COMMERCIAL EDA INDUSTRY441
- 14.6 SUMMARY444
- 14.7 THE PRESCRIPTION444
- References445
- LIST OF ACRONYMS447
- Index451
Visit the authors' companion site! http://www.electronicsystemlevel.com/ - Includes interactive forum with the authors!
Electronic System Level (ESL) design has mainstreamed – it is now an established approach at most of the world’s leading system-on-chip (SoC) design companies and is being used increasingly in system design. From its genesis as an algorithm modeling methodology with ‘no links to implementation’, ESL is evolving into a set of complementary methodologies that enable embedded system design, verification and debug through to the hardware and software implementation of custom SoC, system-on-FPGA, system-on-board, and entire multi-board systems.
This book arises from experience the authors have gained from years of work as industry practitioners in the Electronic System Level design area; they have seen "SLD" or "ESL" go through many stages and false starts, and have observed that the shift in design methodologies to ESL is finally occurring. This is partly because of ESL technologies themselves are stabilizing on a useful set of languages being standardized (SystemC is the most notable), and use models are being identified that are beginning to get real adoption.
ESL DESIGN & VERIFICATION offers a true prescriptive guide to ESL that reviews its past and outlines the best practices of today.
Table of Contents
CHAPTER 1: WHAT IS ESL?
CHAPTER 2: TAXONOMY AND DEFINITIONS FOR THE ELECTRONIC SYSTEM LEVEL
CHAPTER 3: EVOLUTION OF ESL DEVELOPMENT
CHAPTER 4: WHAT ARE THE ENABLERS OF ESL?
CHAPTER 5: ESL FLOW
CHAPTER 6: SPECIFICATIONS AND MODELING
CHAPTER 7: PRE-PARTITIONING ANALYSIS
CHAPTER 8: PARTITIONING
CHAPTER 9: POST-PARTITIONING ANALYSIS AND DEBUG
CHAPTER 10: POST-PARTITIONING VERIFICATION
CHAPTER 11: HARDWARE IMPLEMENTATION
CHAPTER 12: SOFTWARE IMPLEMENTATION
CHAPTER 13: USE OF ESL FOR IMPLEMENTATION VERIFICATION
CHAPTER 14: RESEARCH, EMERGING AND FUTURE PROSPECTS
APPENDIX: LIST OF ACRONYMS
* Provides broad, comprehensive coverage not available in any other such book
* Massive global appeal with an internationally recognised author team
* Crammed full of state of the art content from notable industry experts
Electronic System Level (ESL) design has mainstreamed – it is now an established approach at most of the world’s leading system-on-chip (SoC) design companies and is being used increasingly in system design. From its genesis as an algorithm modeling methodology with ‘no links to implementation’, ESL is evolving into a set of complementary methodologies that enable embedded system design, verification and debug through to the hardware and software implementation of custom SoC, system-on-FPGA, system-on-board, and entire multi-board systems.
This book arises from experience the authors have gained from years of work as industry practitioners in the Electronic System Level design area; they have seen "SLD" or "ESL" go through many stages and false starts, and have observed that the shift in design methodologies to ESL is finally occurring. This is partly because of ESL technologies themselves are stabilizing on a useful set of languages being standardized (SystemC is the most notable), and use models are being identified that are beginning to get real adoption.
ESL DESIGN & VERIFICATION offers a true prescriptive guide to ESL that reviews its past and outlines the best practices of today.
Table of Contents
CHAPTER 1: WHAT IS ESL?
CHAPTER 2: TAXONOMY AND DEFINITIONS FOR THE ELECTRONIC SYSTEM LEVEL
CHAPTER 3: EVOLUTION OF ESL DEVELOPMENT
CHAPTER 4: WHAT ARE THE ENABLERS OF ESL?
CHAPTER 5: ESL FLOW
CHAPTER 6: SPECIFICATIONS AND MODELING
CHAPTER 7: PRE-PARTITIONING ANALYSIS
CHAPTER 8: PARTITIONING
CHAPTER 9: POST-PARTITIONING ANALYSIS AND DEBUG
CHAPTER 10: POST-PARTITIONING VERIFICATION
CHAPTER 11: HARDWARE IMPLEMENTATION
CHAPTER 12: SOFTWARE IMPLEMENTATION
CHAPTER 13: USE OF ESL FOR IMPLEMENTATION VERIFICATION
CHAPTER 14: RESEARCH, EMERGING AND FUTURE PROSPECTS
APPENDIX: LIST OF ACRONYMS
* Provides broad, comprehensive coverage not available in any other such book
* Massive global appeal with an internationally recognised author team
* Crammed full of state of the art content from notable industry experts