Simulation Methods for ESD Protection Development

Gossner, Harald; Esmark, Kai; Stadler, Wolfgang

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Table of contents
  • Contentsix
  • Prefacevii
  • Chapter 1. ESD basics1
  • 1.1 Introduction1
  • 1.2 The ESD event – models and testing2
  • 1.3 ESD failure mechanisms14
  • 1.4 Quantitative characterization methods18
  • Summary24
  • Bibliography25
  • Chapter 2. Parameters for an ESD protection concept31
  • 2.1 Introduction31
  • 2.2 Basic ESD protection concepts32
  • 2.3 Self-protection of FETs37
  • 2.4 Characteristics of protection devices41
  • 2.5 Requirements for a successful ESD protection concept52
  • Summary60
  • Bibliography61
  • Chapter 3. Simulation flow65
  • 3.1 ESD protection development strategy65
  • 3.2 Simulation based development flow69
  • Summary72
  • Bibliography73
  • Chapter 4. Process simulation75
  • 4.1 Introduction75
  • 4.2 The basics of the important process steps77
  • 4.3 Calibration of process technology parameters in a process simulator81
  • 4.4 Limitations of process simulation of ESD elements82
  • 4.5 Example of a process simulation of NFETs83
  • Summary95
  • Bibliography95
  • Chapter 5. ESD device simulation97
  • 5.1 Basics of device physics and modelling99
  • 5.2 Set-up procedure for ESD device simulation106
  • 5.3 Calibration of device simulation112
  • 5.4 Derivation of a pre-Si ESD protection concept119
  • 5.5 Device simulation of typical protection elements153
  • 5.6 Simulation of different ESD stress pulses175
  • 5.7 Limitations of ESD device simulation185
  • Summary187
  • Bibliography188
  • Chapter 6. ESD circuit simulation193
  • 6.1 Field of application193
  • 6.2 Compact models for analogue simulation195
  • 6.3 Basic compact models of protection devices196
  • 6.4 Compact models of FETs215
  • 6.5 Examples: circuit simulation of ESD problems224
  • 6.6 Limitations of ESD circuit simulation236
  • Summary237
  • Bibliography238
  • Chapter 7. Chip-level ESD verification243
  • 7.1 Goals243
  • 7.2 Verification methods245
  • 7.3 First steps to chip-level ESD simulation246
  • 7.4 Future Challenges for a chip-level ESD simulation250
  • Summary253
  • Bibliography253
  • Chapter 8. Outlook255
  • Appendix259
  • Symbols259
  • Abbreviations264
  • Index266
  • Colour section269
Book details
  • Vendor Elsevier S & T
  • SKU 9780080441474
  • ISBN-13 9780080526478
  • Author Gossner, Harald; Esmark, Kai; Stadler, Wolfgang
  • Category Technology & Engineering
  • Subject Microelectronics

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Simulation Methods for ESD Protection Development looks at the integration of new techniques into a comprehensive development flow, which is now available due advances made in the field during the recent years. These findings allow for an early, stable ESD concept at a very early stage of the technology development, which is essential now development cycles have been reduced. The book also offers ways of increasing the optimization and control of the technology concerning performance. Thus making the process more cost effective and increasingly efficient

This title provides a guide through the latest research and technology presenting the ESD protection development methodology. This is based on a combination of process, device and circuit stimulation, and addresses the optimization of the industry critical issue, reduced development cycles.Written to address the needs of the ESD engineer, this text is required reading by all industry practitioners and researchers and students within this field.

The FIRST Extensive overview on the subject of ESD simulation·

Addresses the industry critical issue of reduced development cycles, and provides solutions·

Presents the latest research in the field with high practical relevance and its results